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Addresses used in a program, i.e. pointer values, are so called "virtual addresses". The processor contains a small amount of ultra-fast associative memory that stores conversions of several (usually 64) page virtual addresses into its physical addresses. Since 64 table rows are obviously not enough for real tasks, x86 architectures employ page tables located in the main memory. Each page table is a page itself and consists of page table entries. Since the number of entries in one table is limited and depends on the entry size and page size, tables are arranged in multiple levels. There are usually 2 or 3 levels, and sometimes even 4 levels (for 64-bit architectures).
Contemporary implementations of the x86-64 architecture use 48-bit physical addresses (which can be extended to 52 bits) that allow you to address up to 256 Tbytes of main memory. This size is currently considered excessive for real systems, while increase of the address capacity will cause page tables to bloat, which will in its turn lead to an increase of the number of levels as well.
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